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Features
* * * *
Operating Supply Range 3.0V to 3.6V Power Dissipation 1W Max Low-power Sleep Mode (<0.5 mW) RF Data Channel - Automatic Gain Control or Programmable Gain Mode - Wide Bandwidth VGA - VGA Accepts Inputs from 30-300 mV Peak-to-peak Differential (PPD), 60-600 mV PPD or 110-1100 mVPPD - Programmable Equalization via 7th-order Equiripple Filter with Programmable Symmetric Zeros - Programmable 5-to-1 Filter Cutoff Range - Data Slicer with DC Restore Circuit - Wide Frequency Range Clock Extraction - Frequency Synthesizer with Independent 7-bit M and 6-bit N Dividers, Better than 1% Resolution - Highly Programmable to Accommodate DVD (1-5X) and CD (6-30X) - Write Asymmetry Measurement for Adjusting Write-mode Power - Data Recovery Supports CLV, ZCLV, ZCAV Recording - Optional Internally-generated Timing for AGC and Timing Recovery * Synthesizer Functions - Supports Wobble Clock Synthesis, Using Low-jitter PLL * Servo Algebra and OPC Functions - 45 MHz Bandwidth for Differential Phase Tracking Detector - Land and Groove Detector for DVD RAM - Supports One Beam Push/Pull Tracking Output - Supports One Beam Differential Phase Tracking - Supports Three-beam Push/Pull Tracking Output, Using E, F, G, H - Focus Error Signal Output - Focus OK Signal - Track Crossing Detection - Mirror Signal Output - Wobble Detection for DVD RAM, DVD-RW, DVD-R - Detects Tracking Error OK - Provides Sample and Hold Functions for CD and DVD OPC - Formats Pre-pit Data, Using Raw Pre-pit Information from AT78C1503 * Header Detection for DVD RAM
DVD/CD Read Channel AT78C1503 AT78C1507
Description
The AT78C1503 is a programmable DVD/CD channel responsible for servo algebra, gain control, equalization, bit detection and clock extraction for CD-ROM, DVD-ROM, DVD-R, DVD-RW and DVD-RAM formats. Programmable features allow data rates up to 5X DVD. Also, for DVDRAM functionality, the channel serves the write path providing laser power control and pit asymmetry detection. Up to 2X DVD write speeds are supported for DVD-R, DVD-RW and DVDRAM. The extracted wobble frequency is supplied to the AT78C1507 companion chip which in turn synthesizes the write clock. The AT78C1507 is the companion chip to the AT78C1503 - DVD/CD Read Channel - and the AT78C1504 - DVD/CD Automatic Laser Power Controller. Working in conjunction with the read channel, the AT78C1507 is responsible for wobble clock synthesis for DVD-R and DVD-RAM formats. In addition, the two parts working together also support pre-pit data and clock recovery for the DVD-R format. Four separate inputs are provided to enable the AT78C1507 to perform tracking servo algebra, using just the outrigger photo detector signals (E, F, G, H for example) coming from the OPU. This extends the range of supported tracking servo algebra functions for the 1503-1507 combination. Lastly, OPC capability is supported for efficient writing of DVD-R, DVD-RAM and CD-R disks. Based on CMOS technology, both the AT78C1503 and AT78C1507 operate from a single 3.3V supply and are fully programmable through serial interfaces for both CD and DVD modes.
Rev. 2054A-DVD-07/02
1
Figure 1. DVD System Block Diagram
DRAM
Flash
AT78C1502 Servo Control System
Power Drivers
Sled
AT78C1501 ATAPI I/F Controller DBM ECC SRAM ARM7TDMI
Focus Laser AT78C1504 Laser Power Controller T08XX Laser Amp
Spindle
AT78C1503 Read Channel
AT78C1507 Read Channel Adj.
AT78C1505 Pre-amp
2
DVD/CD Read Channel
2054A-DVD-07/02
DVD/CD Read Channel
Figure 2. AT78C1503 Block Diagram
CAGC 100 SERREG (RF Sequencer) Control AGC CONTROL FREQUENCY SYNTHESIZER 58 FREF 70 DATA7 DATA PLL 69 DATA6 68 DATA5 67 DATA4 RFGEN RFP/N 2/3 VGA MUX 7th ORDER FILTER/ EQUALIZER VGA 66 DATA3 65 DATA2
Sum of Selectable Buffer
AGCLZ 98 AGCHLD 94
FCDAC REG9 <4 0>
BST1 / BST2 REG 8
64 DATA1
Sum of Difference
DC RESTORE
63 DATA0 62 RCLK
FO1P/N 4/5
VGA
FO2P/N 6/7
VGA
01 IDFIELD
TR1P/N 8/9
VGA
DIFFERENTIAL TRACKING DETECTOR DTR2
Sum of Selectable Buffer
AGC Control Voltage
MUX
09 RDSZ
TRACK OK 10/ TR2P/N 11 VGA TRACK ZERO CROSS
48 TOK
47 TZC
AUTO INV D/SE D/SE D/SE D/SE FO1-CD 16 FO2-CD 17 TR1-CD 18 TR2-CD 19
MUX
28 TE
Slow Arithmetic Push/Pull
Tracking
44 WOBBLE 45 ID12 46 ID34 27 FE FOCUS OK 49 FOK
and Normalization
Focus Error Mirror Detector Wobble Detector Land-groove
Detector
50 MIRROR 29 SLOWSUM 59 RFDROP
REXT 13
VREF 41 RG TEST SERIAL REGISTER / 127 MODE CONTROL 77 WG 40 PD 93 92 P N TP1 91 90 P N TP2 93 82 P N TP3 85 84 P N TP4 51 NA 53 CLK 52 ATA
3
2054A-DVD-07/02
Figure 3. AT78C1503 Pin-out
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77 WG
RDSZ
AGCFST
VDD2
VSS2
TSDDTP2N
TSDDTP1N
TRSIN1N
TSDDTP2P
TSDDTP1P
TRSIN2N
ACGLZ
VDD10
TRSIN1P
TRSIN2P
TP1N
TP2N
CDCRN
AGCHLD
CDCRP
VSS10
WCLK
TP1P
CACG
TP2P
76
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
IDFEILD RFP RFN FO1P FO1N FO2P FO2N TR1P TR1N TR2P TR2N FOHG REXT VDD1 VSS1 FO1_CD FO2_CD TR1_CD TR2_CD VDD6 SS_H VSS6 REFFRONT REFBACK SLOWSUM
TRCST VDD3 VSS3 VDD11 VSS11 DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
AT78C1503
DATA0 RCLK RFDROP VDD5 VSS5 FREF VDD7 VSS7 VDD4 VSS4 SCLK SDATA
ADCSTRT
WOBBLE
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
Table 1. AT78C1503 Pin List
Pin # 1 2 3 4 5 6 7 8 9 10 11 Pin Name IDFIELD RFP RFN FO1P FO1N FO2P FO2N TR1P TR1N TR2P TR2N Type Digital Output Analog Input Analog Input Diff Input Diff Input Diff Input Diff Input Diff Input Diff Input Diff Input Diff Input Description Signal to Preamp to Drive ID Select High-speed Signal Input High-speed Signal Input Focus 1 Pos Focus 1 Neg Focus 2 Pos Focus 2 Neg Track 1 Pos Track 1 Neg Track 2 Pos Track 2 Neg
4
DVD/CD Read Channel
2054A-DVD-07/02
50
MIRROR
BWDWN
LENSPOS ATP1
SENA
LHIPWR
BWUP
IDSEL
PORB
VDD8
VDD9
SHLD
IDINT
VSS8
VSS9
ID12
ID34
FOK
TOK
TZC
RG
PD
FE
TE
DVD/CD Read Channel
Table 1. AT78C1503 Pin List (Continued)
Pin # 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 Pin Name FOHG REXT VDD1 VSS1 FO1_CD FO2_CD TR1_CD TR2_CD VDD6 SS_H VSS6 REFFRONT REFBACK LENSPOS ATP1 FE TE SLOWSUM PORB VSS8 VDD8 IDSEL LHIPWR SHLD ADCSTRT BWUP BWDN IDINT PD RG VSS9 VDD9 WOBBLE ID12 ID34 TZC Type Digital Input Passive 3.3V Supply 0V Supply Analog Input Analog Input Analog Input Analog Input 3.3V Supply Digital Input 0V Supply Input/Output Input/Output Analog Input Analog Output Analog Output Analog Output Analog Output Digital Input 0V Supply 3.3V Supply Digital Input Digital Input Digital Input Digital Input Digital Input Digital Input Digital Input Digital Input Digital Input 0V Supply 3.3V Supply Digital Output Digital Output Digital Output Digital Output Description Focus High Gain Passive for 0 TC Current Reference (16.5 K_, 1%) DPD, IBIAS DPD, IBIAS Focus 1, CD Input Focus 2, CD Input Track 1, CD Input Track 2, CD Input Slow Servo Analog Servo Sample and Hold Slow Servo Analog Servo Front-end Reference Level Servo back-end Reference Level Lens Position Error Input Servo Analog Test Point Focus Error Output Tracking Error Output Low-pass Filtered Sum of Photodetector Outputs Power-on Reset, Bar (active-low) Servo DACs Servo DACs ID Field Select Laser High Power Servo Hold Start On-chip 6-bit ADC Bandwidth Up Bandwidth Down Mode Select of Sequencer Power-down User Data Read Gate Servo DAC Rings Servo DAC Rings Wobble Detect Output ID Field 12 Detected ID Field 34 Detected Track Zero Crossing
5
2054A-DVD-07/02
Table 1. AT78C1503 Pin List (Continued)
Pin # 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 Pin Name TOK FOK MIRROR SENA SDATA SCLK VSS4 VDD4 VSS7 VDD7 FREF VSS5 VDD5 RFDROP RCLK DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 VSS11 VDD11 VSS3 VDD3 TRCST WCLK WG TRSIN2N TRSIN2P TRSIN1N TRSIN1P TSDDTP1N Type Digital Output Digital Output Digital Output Digital Input Input/Output Digital Input 0V Supply 3.3V Supply 0V Supply 3.3V Supply Digital Input 0V Supply 3.3V Supply Digital Output Digital Output Digital Output Digital Output Digital Output Digital Output Digital Output Digital Output Digital Output Digital Output 0V Supply 3.3V Supply 0V Supply 3.3V Supply Digital Input Digital Output Digital Input Diff Input Diff Input Diff Input Diff Input Test Output Description Track OK Focus OK Mirror Detect (ROM)/Mirror Field Detect (RAM) Serial Data Enable; Must Be High to Read or Write Serial Registers Serial Data, Input (write data) or Output (read data) Serial Data Clock ESD Ring, Digital Ring ESD Ring, Digital Ring Slow Servo Digital, Synthesizer Dividers Slow Servo Digital, Synthesizer Dividers Reference Clock Input to Synthesizer Digital I/O Supply Digital I/O Supply RF Dropout Detected Recovered Clock Divided by 4 or 8 Recovered Data Out, Bit 0 (last in time) Recovered Data Out, Bit 1 Recovered Data Out, Bit 2 Recovered Data Out, Bit 3 Recovered Data Out, Bit 4 Recovered Data Out, Bit 5 Recovered Data Out, Bit 6 Recovered Data Out, Bit 7 (first in time) Digital I/O Ring Digital I/O Ring TR CML, Synthesizer CML, DC Restore TR CML, Synthesizer CML, DC Restore Timing Recovery Coast Write Clock Write Gate (enables write clock) Timing Recovery/Synthesizer Test Input Timing Recovery/Synthesizer Test Input Timing Recovery/Synthesizer Test Input Timing Recovery/Synthesizer Test Input TR/Detector/Phase Detector Test Input
6
DVD/CD Read Channel
2054A-DVD-07/02
DVD/CD Read Channel
Table 1. AT78C1503 Pin List (Continued)
Pin # 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 Pin Name TSDDTP1P TSDDTP2N TSDDTP2P CDCRN CDCRP VDD2 VSS2 TP2N TP2P TP1N TP1P AGCHLD AGCFST VSS10 VDD10 AGCLZ RDSZ CAGC Type Test Output Test Output Test Output Diff Passive Diff Passive 3.3V Supply 0V Supply Diff Output Diff Output Diff Output Diff Output Digital Input Digital Input 0V Supply 3.3V Supply Digital Input Analog Output Passive Description TR/Detector/Phase Detector Test Point TR/Detector/Phase Detector Test Input TR/Detector/Phase Detector Test Input Detector Duty Cycle Feedback Cap Detector Duty Cycle Feedback Cap RF Front-end Ring RF Front-end Ring Test Point 2 Output Test Point 2 Output Test Point 1 Output Test Point 1 Output AGC Hold Input AGC Fast Recovery Input AGC, LPF AGC, LPF Low Z Control for AGC Input AGC Cap/Detector Cap Voltage Outputs External Capacitor for AGC Loop
Table 2. Supply Pins
Supply Pin VDD/SS1 VDD/SS2 VDD/SS3 VDD/SS4 VDD/SS5 VDD/SS6 VDD/SS7 VDD/SS8 VDD/SS9 VDD/SS10 VDD/SS11 Circuitry DPD, IBIAS, RTRIM RF Front-end Ring TR & Synth CML, DC Restore, RF Dropout Analog ESD & Digital Ring Digital I/O Supply Servo Analog Servo, Synth and RF Dropout Digital, CMOSTPMUX, Serial Registers 1 and 3, Calibrator Servo DACs Servo DAC Rings AGC, LPF Digital I/O Ring
7
2054A-DVD-07/02
Figure 4. AT78C1507 Block Diagram - Wobble PLL and OPC Sample and Hold
75 WBLIN SFLTP SFLTN 87
86
Phase/Frequency Comparator
Q Pump
VCO
1/(P+1)
WOBBLE
1/186
WOBLE X 186 WOB2X
76 WCLK
SELOPC CD/DVD 37 SHCD
Reg50 <3:2> S&H MUX for OPC
PCLK
61
OPCOUT
27
38
SHDVD
19
DVDOPC
WOBBLE + 180 DEG
18
CDOPC
98
PTSEL
RS Q PDATA 62
95
PTOP MUX PBOT
D
FF
94
8
DVD/CD Read Channel
2054A-DVD-07/02
DVD/CD Read Channel
Figure 5. AT78C1507 - Tracking Error Path
SHSB 21 GSEL Reg 49<7:4> BWSEL Reg 49<3:0> SE TP2 29 V21 SE TP2 30 "F" P/N 6/7 Sample & Hold D2SE BW/LPF SE TP2 31 "G" P/N 8/9 Sample & Hold D2SE BW/LPF SE TP2 32 "H" 10/11 P/N Sample & Hold D2SE BW/LPF V21 V21 Gain & Offset Adj V21 Gain & Offset Adj
Reg. 51-58 <7:3> Gain & Offset Adj
"E" P/N
4/5
Sample & Hold
D2SE
BW/LPF
Reg. 62-65 (E+F) - (G+H) + Normalization
Outrigger Signals
(-)
(+)
Gain & Offset Adj
SUMSB
29
Outrigger Tracking Error
SE TP2 28 REFBACK 24 12V TRI2VHIG Reg 56<2> TEOFF Reg 57 <2:0> + SGNTEOFF Reg 56 <1> VGA 100 kHz TEGOUT Reg 69 <3:0> 28 SELTE Reg 56 <0> IDINT Reg 32 <6> LPF SE TP2 25
TE
TEG1\I2VLOG Reg 68 <3:0>
TEG1\I2VHIG Reg 68 <7:4>
DC Offset
ENMB Reg 66<1> POLMB Reg 66 <2> TEMB Pin 25
25
Main Beam From 1503
GSELMB Reg 68 <7:4>
Vref
9
2054A-DVD-07/02
Figure 6. AT78C1507 Pin-out
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
NC0 NC1 NC2 EP EN FP FN GP GN HP HN WBLCOAST REXT VDD1 VSS1 TLOW2 TLOW3 CDOPC DVDOPC VDD6 SHSB VSS6 REFFRONT REFBACK ADCSTRT OPCOUT LHIPWR TEMB ATP1 SUMSB SHDVD TLOW4 TLOW7 TLOW8
WBLIN VDD3 VSS3 VDD11 VSS11 CTP7 CTP6 CTP5 CTP4 CTP3 CTP2 CTP1
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
AT78C1507
CTP0 PDATA PCLK VDD5 VSS6 FREF VDD7 VSS7 VDD4 VSS4 SCLK SDATA SENA
PORB
SHCD
VDD8
VDD9
VSS6
VSS9
NC10
THI1
THI2
TOK
NC4
NC9
NC5 49
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Table 3. AT78C1507 Pin List
Pin # 1 2 3 4 5 6 7 8 9 10 11 Pin Name NC0 NC1 NC2 EP EN FP FN GP GN HP HN Type Digital Output Analog Input Analog Input Diff Input Diff Input Diff Input Diff Input Diff Input Diff Input Diff Input Diff Input Description Not Used Not Used Not Used "E" Input Pos "E" Input Neg "F" Input Pos "F" Input Neg "G" Input Pos "G" Input Neg "H" Input Pos "H" Input Neg
10
DVD/CD Read Channel
2054A-DVD-07/02
50
ND6
TZC
TE
DVD/CD Read Channel
Table 3. AT78C1507 Pin List (Continued)
Pin # 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 Pin Name WBLCOAST REXT VDD1 VSS1 TLOW2 TLOW3 CDOPC DVDOPC VDD6 SHSB VSS6 REFFRONT REFBACK TEMB ATP1 OPCOUT TE SUMSB PORB VSS8 VDD8 TLOW4 LHIPWR THI1 ADCSTRT SHCD SHDVD TLOW7 TLOW8 THI2 VSS9 VDD9 Type Digital Input Passive 3.3V Supply 0V Supply 0V 0V Analog Input Analog Input 3.3V Supply Digital Input 0V Supply Input/Output Input/Output Analog Input Analog Output Analog Output Analog Output Analog Output Digital Input 0V Supply 3.3V Supply 0V Digital Input 3.3V Digital Input Digital Input Digital Input 0V 0V 3.3V 0V Supply 3.3V Supply Description Coast Wobble Clock Synthesizer 16 K_, 1% Resistor to 0V Supply (for on-chip biasing) Power Supply Power Supply Tie-down to a 0V Supply Tie-down to a 0V Supply CD Monitor Diode DVD Monitor Diode Power Supply Sample/Hold Control for E, F, G, H (1 = Sample, 0 = Hold) Power Supply Front-end Reference Voltage Back-end Reference Voltage Tracking Error Main Beam from AT78C1503 (generated using A, B, C, D) Analog Test Point (single-ended) Sampled Monitor Diode Output Tracking Error Output E+F+G+H Power-on Reset, Bar (active-low) Power Supply Power Supply Tie-down to a 0V Supply Laser High Power Tie-up to a 3.3V Supply Start on-chip 6-bit ADC Sample/Hold Control for CD Monitor Diode (1 = Sample, 0 = Hold) Sample/Hold Control for DVD Monitor Diode (1 = Sample, 0 = Hold) Tie-down to a 0V Supply Tie-down to a 0V Supply Tie-up to a 3.3V Supply Power Supply Power Supply
11
2054A-DVD-07/02
Table 3. AT78C1507 Pin List (Continued)
Pin # 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 Pin Name NC4 NC9 NC10 TZC TOK NC5 NC6 SENA SDATA SCLK VSS4 VDD4 VSS7 VDD7 FREF VSS5 VDD5 PCLK PDATA CTP0 CTP1 CTP2 CTP3 CTP4 CTP5 CTP6 CTP7 VSS11 VDD11 VSS3 VDD3 WBLIN WCLK WCLKEN Type Digital Output Digital Output Digital Output Digital Output Digital Output Digital Output Digital Output Digital Input Input/Output Digital Input 0V Supply 3.3V Supply 0V Supply 3.3V Supply Digital Input 0V Supply 3.3V Supply Digital Output Digital Output Digital Output Digital Output Digital Output Digital Output Digital Output Digital Output Digital Output Digital Output 0V Supply 3.3V Supply 0V Supply 3.3V Supply Digital Input Digital Output Digital Input Description Not Used Not Used Not Used Track Zero Crossing Tracking Error OK Not Used Not Used Serial Data Enable (must be high to read or write serial registers) Serial Data, Input (write data) or Output (read data) Serial Data Clock Power Supply Power Supply Power Supply Power Supply Frequency Reference for Wobble Clock Synthesizer Power Supply Power Supply Pre-pit Clock Pre-pit Data Digital Test Point Out, Bit 0 Digital Test Point Out, Bit 1 Digital Test Point Out, Bit 2 Digital Test Point Out, Bit 3 Digital Test Point Out, Bit 4 Digital Test Point Out, Bit 5 Digital Test Point Out, Bit 6 Digital Test Point Out, Bit 7 Power Supply Power Supply Power Supply Power Supply Raw Digital Wobble from AT78C1503 Write Clock (synthesized wobble clock) Write Clock Enable
12
DVD/CD Read Channel
2054A-DVD-07/02
DVD/CD Read Channel
Table 3. AT78C1507 Pin List (Continued)
Pin # 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 Pin Name TLOW9 TLOW10 TLOW11 TLOW12 TSDDTP1N TSDDTP1P TSDDTP2N TSDDTP2P SFILTN SFILTP VDD2 VSS2 TP2N TP2P TP1N TP1P PBOT PTOP VSS10 VDD10 PTSEL NC7 NC8 Type 0V 0V 0V 0V Test Output Test Output Test Output Test Output Diff Passive Diff Passive 3.3V Supply 0V Supply Diff Output Diff Output Diff Output Diff Output Digital Input Digital Input 0V Supply 3.3V Supply Digital Input Analog Output Passive Description Tie-down to a 0V Supply Tie-down to a 0V Supply Tie-down to a 0V Supply Tie-down to a 0V Supply Differential Analog/CML Test Point1 Neg Differential Analog/CML Test Point1 Pos Differential Analog/CML Test Point2 Neg Differential Analog/CML Test Point2 Pos Wobble Synthesizer Filter Neg Wobble Synthesizer Filter Pos Power Supply Power Supply Not Used Not Used Not Used Not Used Bottom Pre-pit Detect from AT78C1503 Top Pre-pit Detect from AT78C1503 Power Supply Power Supply Pre-pit Top Select (PTSEL = 1 selects input on pin PTOP; PTSEL = 0 selects input on PBOT) Not Used Not Used
13
2054A-DVD-07/02
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2054A-DVD-07/02

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